The demand for power amplifiers for wireless handsets is growing at a rapid rate. Communication standards such as GSM, EDGE and DCS require precise output power control of the power amplifier (PA). Generally, a current controlled bipolar transistor is used, such as a BJT or an HBT, to improve signal to noise ratio of receiver channels. At the same time, talk time and battery life are increased by reducing power consumption of the transmitter.
Moreover, overall system efficiency of a GSM/EDGE transmitter can be increased using polar architectures [1]. In this case, bias circuits to control the PA output power, with large dynamic range and no degradation on efficiency and linearity, need to be designed to comply with system specifications.
A voltage limited mode will now be discussed. The output power of a high efficiency PA can be expressed in terms of the supply voltage Vcc as:
                              P          OUT                =                              k            V                    ·                                                    (                                                      V                    CC                                    -                                      V                    CESAT                                                  )                            2                                      R              LOAD                                                          Equation        ⁢                                  ⁢        1            
Where Rload represents the load resistance and kv is a scale factor function of the class of operation of the power amplifier. Thus, as well as in AM modulators [2], a linear dB regulation of the output power can be obtained by varying the supply voltage Vcc using a linear voltage regulator [3] to control the PA output power. A simplified implementation of this approach is depicted in FIG. 1.
At low power levels, when Vcc approaches VCESAT, accuracy of the power control is limited due to the inability to compensate VCESAT and non-linear effects of temperature variations. Power dynamic range is then limited between the maximum supply voltage, usually fixed by the application and the power device ruggedness, and a minimum supply voltage that is close to VCESAT of the power transistor.
An extended high accuracy range can be obtained if a power control feedback is introduced between the PA and the voltage regulator to compensate output power variation due to temperature changes. In this case, a directional coupler and power detectors can be used to close the feedback loop with the drawbacks of an increased insertion loss along the transmit channel and a cost increase of the device because of the additional silicon area required. Moreover, stability of the closed-loop needs to be ensured at every power level and load condition.
A current limited mode will now be discussed. It is well known that in high efficiency power amplifiers, the output power is a function of collector current of the bipolar power device when functioning in a discontinuous conduction mode. Thus, an enhanced output power dynamic range and accuracy of control can be obtained by sensing and limiting the output current of the PA.
In this case, the amplifier operating mode becomes a current-limited operation mode in which Equation 1 no longer holds and Pout is given by the following equation:Pout=kC·Iout2·RLOAD  Equation 2
In bipolar technology amplifiers, collector current is a function of the base current, and therefore of the base-emitter voltage applied to the transistor. An example of a prior art approach [4] is depicted in FIG. 2 in which there are no extra losses and a relatively small amount of additional device area is required. This approach makes use of the relationship between output power and base-emitter voltage. The supply voltage Vcc may be constant. A sense transistor may be a bipolar transistor is formed as close as possible to the output power transistor to generate the current Isense. The sense transistor may even be a field effect transistor. A scaled replica of the DC current drawn by the power transistor is then converted to a voltage Vsense. The voltage Vsense is AC shunted to ground while a DC component is fed to the non-inventing input of the error amplifier U1.
The output of the error amplifier U1 is connected to the base terminal of the power transistor, and due to the negative feedback loop, controls the DC collector current of the bipolar power transistor. With the PA output power proportional to the DC collector current, control of the output power is actuated by varying a power control voltage Vpc. A current limited mode is then obtained by controlling the base-emitter voltage of the power transistor at a constant voltage Vcc.
A similar current sensing cell employed in a feedback bias control circuit is described in E. Jarvinenn, “Bias Circuits for GaAs HBT Power Amplifiers,” 2001 IEEE MTT-S Digest, pp 507-510 [5]. However, in both of these approaches, the current Isense (or Im) can be assumed to represent a scaled replica of the DC current of the power bipolar junction transistor only if the sense and the power transistor have the same temperature, same base-emitter voltage and same AC load.
These conditions hardly exist in the case of an AC grounded load of the sense transistor. Therefore, mismatches will occur between the collector currents of the power and of the sense transistor due to a high harmonic content of collector voltage and current waveforms. Once the AC load termination of the power transistor has been fixed, a two-step calibration procedure will be necessary. First, output power versus collector current of the power transistor; and secondly, collector current versus the current Isense (i.e., the voltage Vsense) of the sense transistor. These mismatches limit the field of application of the circuit arrangement proposed in [4] to linear power amplifiers or to saturated amplifiers to a limited range of accuracy.